The market for highly scalable data center infrastructure is on the verge of a significant shift in AMD's server portfolio. According to information gleaned from a product listing by cooler manufacturer Dynatron, the next generation of power-efficient EPYC processors, known under the codename “Verano,” will be based on a new socket called SB1. This leak offers a concrete first look into the physical design of the new low-power CPU series.
Notably, this represents a departure from the established socket standard. While current AMD EPYC processors (Turin) use the SP5 socket and future high-performance generations are expected to utilize SP7 and SP8 variants with pin designs, the “B” prefix in the socket name SB1 points to a fundamental change in packaging technology. It indicates a BGA (Ball Grid Array) design, where contact points are not inserted as pins into a socket but are arranged as balls on the package itself.
In practice, the SB1 design means that the CPUs will be permanently mounted and soldered onto the server motherboard. Unlike conventional pin sockets, which allow for rapid processor replacement during operation or for troubleshooting, this construction makes the processors non-replaceable. This implies a distinctly different service philosophy for server maintenance, where a processor failure typically necessitates the replacement of the entire motherboard or the complete node.
The “Verano” processors, officially announced as EPYC 9006 LP (Low Power), are built on the upcoming Zen-6 architecture. They are specifically designed for deployment in dense rack-scale systems where power consumption per node and cooling play a central role. Such systems are in high demand, particularly in the field of AI inference and high-availability data centers, where operating many energy-efficient compute nodes is more important than deploying individual high-performance CPUs.
These new low-power CPUs are currently planned to hit the market in 2027. The decision to use a BGA design instead of a pin socket underscores AMD’s focus on extreme energy efficiency and cost optimization in dense server installations. By forgoing the complex pin mechanism, smaller packages, improved thermal performance, and lower manufacturing costs for the CPU packages themselves may be achieved, thereby increasing the overall efficiency of server racks in the aggregate.