#Xeon

Intel Enhances Linux Performance and ASRock Prepares for AM5 Support: New Cache-Aware Scheduling Patches and X870 Beta BIOS

Intel has released the fourth version of its Cache Aware Scheduling patches for Linux, aiming to enhance performance on modern Intel Xeon and AMD EPYC processors through optimized task placement. Meanwhile, ASRock has issued a beta BIOS for X870 and X870E motherboards based on AGESA 1.3.0.0a, addressing memory compatibility and boot failures, and signaling a technical preview of future AM5 CPU support. Both updates highlight ongoing efforts to optimize hardware and software ecosystems for upcoming processor generations.

Intel Unveils Xeon 6+ with 288 Efficiency Cores and 18A Technology – New 'Clearwater Forest' Architecture for Mobile and Data Center Workloads

Intel unveiled the new Xeon 6+ processor at MWC 2026, featuring up to 288 E-cores built on the 18A process node with the 'Clearwater Forest' architecture. Developed in collaboration with Ericsson, the processor delivers up to 30% higher performance and up to 60% greater efficiency compared to previous generations. Designed for high-performance computing and data center workloads, the chip aims to reduce energy consumption and enable infrastructure consolidation. Availability for telecom vendors is expected starting in 2027.

Intel Shifts Strategy: SambaNova Deal Falls Through, Xeon Partnership and Granite Rapids Updates Announced

Intel has scrapped its planned acquisition of AI chip company SambaNova and instead agreed to a strategic partnership based on Xeon CPUs. The company also released technical details on its Granite Rapids-WS Xeon 600 processors, including reduced boost speeds due to AVX-512 and AMX instructions, and issued an updated microcode for the Granite Rapids D series to fix hardware-specific issues. These developments reflect Intel's evolving strategy in the competitive AI hardware market while addressing ongoing technical challenges.

Linux 7.0 Adds Support for Intel DSA 3.0 and New L2 Cache Metrics

Linux 7.0 includes initial preparations for Intel’s DSA 3.0 accelerators, enabling data movement and transformation tasks on Xeon processors with new sysfs interfaces and SGL size support. Additionally, the Turbostat utility now reports new L2 cache metrics such as L2MRPS and L2%hit for recent Intel processors including Xeon Sapphire Rapids, Atom Gracemont, and Alder Lake, thanks to updated performance counters in the kernel. These enhancements improve user-space visibility of hardware capabilities, despite some deviations from standard Linux kernel practices.